The present invention relates generally to semiconductor epitaxy and more specifically to a method for reducing defects within III-V semiconductor materials epitaxially grown on mismatched crystalline substrates.
For many III-V semiconductor material epitaxies, for example GaAs, annealing at temperatures higher than the growth temperature (i.e., temperatures above 550° C.) may be performed after epitaxial growth to annihilate defects and reduce overall defect densities. However, high temperature annealing may cause problems when one of the III-V materials used to form the epitaxial layer exhibits a high partial vapor pressure. For example, during high temperature annealing, Group V materials, which tend to have higher vapor pressures than Group III materials, may evaporate from the surface of the III-V semiconductor epitaxy, leaving droplets of Group III material behind. Such decomposition of the III-V semiconductor may lead to pitting of the III-V semiconductor, and subsequently, erosion of layers formed on top of the III-V semiconductor. These defects may degrade the performance of the III-V semiconductor device.